;------------------------------------------------------------------- ; Copyright 1997 KEIL ELEKTRONIK GmbH. 1997, All rights reserved. ; SAB C504 Processor Declarations ;------------------------------------------------------------------- $SAVE $NOLIST ; ; BYTE Register P0 DATA 080H SP DATA 081H DPL DATA 082H DPH DATA 083H WDTREL DATA 086H PCON DATA 087H TCON DATA 088H PCON1 DATA 088H ; in mapped SFR area TMOD DATA 089H TL0 DATA 08AH TL1 DATA 08BH TH0 DATA 08CH TH1 DATA 08DH P1 DATA 090H P1ANA DATA 090H ; in mapped SFR area SCON DATA 098H SBUF DATA 099H ITCON DATA 09AH P2 DATA 0A0H IEN0 DATA 0A8H IEN1 DATA 0A9H SRELL DATA 0AAH P3 DATA 0B0H P3ANA DATA 0B0H ; in mapped SFR area SYSCON DATA 0B1H IP0 DATA 0B8H ; IP1 DATA 0B9H WDCON DATA 0C0H CT2CON DATA 0C1H CCL0 DATA 0C2H CCH0 DATA 0C3H CCL1 DATA 0C4H CCH1 DATA 0C5H CCL2 DATA 0C6H CCH2 DATA 0C7H T2CON DATA 0C8H T2MOD DATA 0C9H RC2L DATA 0CAH RC2H DATA 0CBH TL2 DATA 0CCH TH2 DATA 0CDH TRCON DATA 0CFH PSW DATA 0D0H CP2L DATA 0D2H CP2H DATA 0D3H CMP2l DATA 0D4H CMP2H DATA 0D5H CCIE DATA 0D6H BCON DATA 0D7H ADCON0 DATA 0D8H ADDATH DATA 0D9H ADDATL DATA 0DAH ADCON1 DATA 0DCH CCPL DATA 0DEH CCPH DATA 0DFH ACC DATA 0E0H CT1CON DATA 0E1H COINI DATA 0E2H CMSEL0 DATA 0E3H CMSEL1 DATA 0E4H CCIR DATA 0E5H CT1OFL DATA 0E6H CT1OFH DATA 0E7H B DATA 0F0H ; BIT-addressable registers ; TCON TF1 BIT 08FH TR1 BIT 08EH TF0 BIT 08DH TR0 BIT 08CH IE1 BIT 08BH IT1 BIT 08AH IE0 BIT 089H IT0 BIT 088H EWPD BIT 088H ; in mapped SFR area ; SCON SM0 BIT 09FH SM1 BIT 09EH SM2 BIT 09DH REN BIT 09CH TB8 BIT 09BH RB8 BIT 09AH TI BIT 099H RI BIT 098H ; P1, P1ANA EAN3 BIT 093H ; in mapped SFR area EAN2 BIT 092H ; in mapped SFR area EAN1 BIT 091H ; in mapped SFR area T2EX BIT 091H EAN0 BIT 090H ; in mapped SFR area T2 BIT 090H ; IEN0 EA BIT 0AFH ET2 BIT 0ADH ES BIT 0ACH ET1 BIT 0ABH EX1 BIT 0AAH ET0 BIT 0A9H EX0 BIT 0A8H ; IP0 PT2 BIT 0BDH PS BIT 0BCH PT1 BIT 0BBH PX1 BIT 0BAH PT0 BIT 0B9H PX0 BIT 0B8H ; P3, P3ANA RD BIT 0B7H WR BIT 0B6H T1 BIT 0B5H EAN7 BIT 0B5H ; in mapped SFR area T0 BIT 0B4H EAN6 BIT 0B4H ; in mapped SFR area INT1 BIT 0B3H EAN5 BIT 0B3H ; in mapped SFR area INT0 BIT 0B2H EAN4 BIT 0B2H ; in mapped SFR area TXD BIT 0B1H RXD BIT 0B0H ; T2CON TF2 BIT 0CFH EXF2 BIT 0CEH RCLK BIT 0CDH TCLK BIT 0CCH EXEN2 BIT 0CBH TR2 BIT 0CAH C_T2 BIT 0C9H ; C or /T2 CP_RL2 BIT 0C8H ; CP or /RL2 ; WDCON OWDS BIT 0C3H WDTS BIT 0C2H WDT BIT 0C1H SWDT BIT 0C0H ; ADCON0 IADC BIT 0DDH BSY BIT 0DCH ADM BIT 0DBH MX2 BIT 0DAH MX1 BIT 0D9H MX0 BIT 0D8H ; PSW CY BIT 0D7H AC BIT 0D6H F0 BIT 0D5H RS1 BIT 0D4H RS0 BIT 0D3H OV BIT 0D2H F1 BIT 0D1H P BIT 0D0H ; $RESTORE