Release Notes for C51
8051 Development Tool Kits

This file contains release notes and last minute changes that are not found in the printed manuals.

Information in this file, the accompany manuals, and software is
Copyright © Keil Software, Inc and Keil Elektronik GmbH.
All rights reserved.

Contents

1. What's New in C51
2. Example Programs
3. Device Database™
4. Peripheral Simulation
5. Technical Support
6. Contact Details

What's New in C51

The following sections list the changes instituted in each release of the C51 toolset.

C51 Version 7.06 Release

• [ISD51 In-System Debugger - Version 2]
  Corrected: when ISD51 was configured for non-Flash breakpoints, the serial break did not work correctly.
• [Flash Monitor-51 - Version 4]
  Added: Configurations for: AT89C51RD2, and AT89C51SND1. Corrected: break on serial interrupt did not work when the Monitor firmware was generated with an older tool chain.
• [uVision2 Debugger/Simulator]
  Added: Simulation for Atmel AT89C51RD2/ED2/ID2, Dallas 80C530, and Philips 8xC652/654. Corrected: CCU Timer simulation on Philips P89LPC932.
• [uVision2 Debugger/Simulator]
  Added: Context menu commands in Source and Disassembly window: Set Program Counter, Show Disassembly, and Source Code.
• [Cx51 Compiler]
  Corrected: A far pointer compare against NULL may cause wrong pointer values when the next statement re-uses the same pointer.
• [Cx51 Compiler]
  Corrected: the directive NOINTPROMOTE (no integer promotion) did generate incorrect code. Problem was introduced in V7.04 with correction of the integer promotion rules. 

C51 Version 7.05 Release

• [ISD51 In-System Debugger - Version 2]
  Added: Real-Time Flash Breakpoints using In-System Application programming (IAP), User I/O via serial debugging interface and address range for the memory verify function.
• [Flash Monitor-51 - Version 4]
  A new variant of Monitor-51 is included in the Professional Developers Kit. The Monitor runs on un-modified Flash Devices that offer IAP programming. It can run from the on-chip resources of standard 8051 Flash Devices and does not require von-Neumann memory. Flash Monitor includes Flash download and real-time breakpoint support. Currently the Monitor is pre-configured for Atmel T89C51CC01,  T89C51RC2, and T89C51RD2, but can be also configured for other devices.
• [uVision2 Debugger/Simulator]
  Added: simulation for Atmel T89C51CC02, T8xC5115, AT89C1051, AT89C1051U, AT89C2051, AT89C4051 and Philips P8xC51Rx2, P8xC51RB2H/RC2H/RD2H, P8xC3xX2. 
• [uVision2 Debugger/Simulator]
  Corrected: AT89S8252 EEPROM simulation with Dual DPTR access and ADuC832 ADC DMA Stop.
• [uVision2 Debugger]
  Corrected: local variables did not automatically display in the watch window - locals tab.
• [LX51 Extended Linker]
  Corrected: potential problem with linker code packing on optimize level 10 and 11.
• [C51 Compiler]
  Corrected: erroneous combining of identical end sequence of while (1) loops.

C51 Version 7.04 Release

• [Philips MX Device Support]
  Changed INIT_MX.A51: initialization is enabled for far variables by default; far variables can now be absolutely located with _at_.
• [Monitor for Dallas Contiguous Mode]
  Corrected breakpoints above 64KB code and single stepping in switch/case statements did not work.
• [uVision2 Target Debugger]
  Added call stack display and step out command for classic 8051 devices. Added EPM900 Emulator/Programmer support for Philips 89LPC932.
• [C51 Compiler]
  Corrected: integer promotion rules on combined pointer and char arithmetic, for example:

  int xdata *Test (int xdata * adr, unsigned char a, unsigned char b)  {
    return adr+(a+b);       // did not promote 'a+b' to int
  }

• [A51 Assembler, AX51 Assembler]
  C-style operators: | (OR), & (AND), ~ (NOT) are now accepted by the A51 and AX51 assembler which is useful for common C and assembler header files with #define statements.

C51 Version 7.03a Release

• [RTX51 Tiny2]
  Corrected os_wait problems on K_IVL,  K_TMO + K_SIG events. Refer to Keil\C51\RtxTiny2\Readme.TXT for details.
• [uVision2 Debugger/Simulator]
  Added Cygnal 80C51F02x device simulation.

C51 Version 7.03 Release

• [C51 Compiler]
  Corrected incorrect warnings on enum mismatches.
• [LX51 Linker]
  Corrected fixup error messages on Dallas 390 target.

C51 Version 7.02 Release

• [LX51 Linker]
  Corrected problems with linker code packing and code banking and a potential problem with the bank switch table location in banking mode 4.
• [LX51 Linker]
  Added the SPEEDOVL directive to makes LX51 and BL51 compatible for data overlaying. Detailed information on SPEEDOVL is available in the Assembler/Utilities User's Guide, Chapter 9, Control Summary.
• [BL51 Linker, LX51 Linker, Libraries]
  Added support for Mentor M8051EW Memory Extension that provides access to 1MB ROM and 1MB RAM. Details are described in Application Note 171. The IBANKING directive supports the on-chip banking hardware on M8051EW based devices and is available in both the BL51 Linker and the LX51 Linker. Additionally, LX51 may be configured with the L51IBANK.A51 file that supports a 64KB bank for constants and 16 x 64KB banks for far variables. Refer to \C51\Examples\M8051EW folder for example code and further information.
• [C51 Compiler, CX51 Compiler]
  Corrected a potential problem with generic and far pointer comparisons to a NULL pointer constant.
• [C51 Compiler, CX51 Compiler]
  Enhanced warning messages on enum and memory typed pointer assignments.
• [Monitor for Dallas Contiguous Mode]
  Released MON390 which provides a target monitor for the Dallas Contiguous Mode. Detailed information, pre-configured Monitor versions, and example programs may be found in the \C51\MON390 folder.
• [uVision2 Debugger/Simulator]
  Added simulation for several new devices (Atmel 89C51Ix). The Cygnal 80C51F02x devices are currently in beta status.
• [uVision2 IDE]
  Added Flash menu to uVision2. Flash programming commands may be configured under Options for Target ­ Utilities. These provide a direct interface to external Flash programming tools like Philips FlashMagic.
• [RTX51 Tiny Version 2]
  Released RTX51 Tiny Version 2. This release contains several new enhancements like code banking support and cooperative task switching.

C51 Version 7.01 Release

• [C51 Compiler]
  Added support for Extended Call Return Mode (ECRM) available in the new Philips 51MX devices. This mode is configured in START_MX.A51. It enhances the code density of the ROM(HUGE) memory model that provides an 8MB linear program memory. This optimization requires that Linker Code Packing is enabled. Once this option is enabled, ACALL, LCALL, and ECALL instructions are optimized.
• [C51 Compiler]
  Corrected minor problems in the ROM(HUGE) memory model.
• [uVision2 IDE]
  Added several new devices to the uVision2 device database.
• [uVision2 IDE]
  Added peripheral simulation for the new Philips 89LPC932.
• [uVision2 IDE]
  Added peripheral simulation for the second UART in Winbond devices.
• [uVision2 IDE]
  Added peripheral simulation for the four priority levels in the new version of the Philips 8xC552 device.
• [C51 Compiler]
  Corrected problems in L51_BANK.A51 with regards to variable code banking on classic 8051 devices that used standard banking hardware.
• [C51 Compiler]
  Corrected a syntax problem (that was introduced in Version 7.00) in the setjmp.h header file.
• [LX51 Linker]
  Validated LX51 Linker Code Packing for Philips 51MX and Dallas 390/400 devices.
• [BETA RELEASE]
  Released RTX51 Tiny Version 2 BETA with the following new features and enhancements:
  • Code Banking Support
  • Explicit Task Switch Function
  • RUN Status Flag
  • CPU IDLE Mode Support
  • Hooks for Adding User Code to the RTX51 Tiny Hardware Timer Interrupt
  • Improved Handling for Interval Events
  • Reduced Code and Data Size
  • Improved Performance
• [BETA RELEASE]
  Released MON390 BETA which provides a target monitor for the Dallas Contiguous Mode. Detailed information, pre-configured Monitor versions, and example programs may be found in the \C51\MON390 folder.

C51 Version 7.00 Release

• [C51 Compiler]
  Added the ROM(HUGE) directive which provides support for the Philips 51MX Linear Programming Model. Select this option in uVision2 using Options for Target-Code Rom Size: Huge: 8MB program. More information is available in Application Note 160: Programming the Philips 51MX Architecture with the Keil PK51.
• [C51 Compiler]
  Added the ability to perform 24-bit arithmetic calculations using far pointers. For more information, refer to Application Note 160: Programming the Philips 51MX Architecture with the Keil PK51.
• [ISD51]
  Released ISD51 (In-System Debugger): a new target debugger that may be linked to user applications. Refer to \C51\ISD51 for more information.
• [LX51 Linker]
  Added a new LX51 Linker-Level Optimization called Linker Code Packing. This optimization analyzes and reduces total program size. In uVision2, enable this optimization in Options for Target - C51: Code Optimization: Linker Code Packing. This optimization is available for all projects even those that use code banking. Note that this optimization is still a BETA RELEASE for the Philips 51MX and Dallas 390/400 devices.
• [C51 Compiler]
  Added two new optimizations to the C51 Compiler that reduce program code size. In uVision2, enable these optimization in Options for Target - C51: Code Optimization: Level.
• [Lx51 Linker]
  Added Linker Disassembly Output File. This output file contains the complete disassembly of your application complete with intermixed high-level source and all addresses. In uVision2, enable this option in Options for Target - Listing - Linker Code Listing.

C51 Version 6.23 Release

• [C51 Compiler]
  Corrected problems with register optimizations in while loops.
• [C51 Compiler]
  Corrected problems implicitly casting types in ternary statements.
• [C51 Compiler]
  Enhanced performance of the run-time library and pointer operations for the Dallas Semiconductor 80C390 Contiguous Mode.
• [C51 Compiler]
  Added ability to locate XDATA and CODE in regions other than 00:xxxx for the Dallas Semiconductor 80C390.
• [C51 Compiler]
  Corrected various problems with initializations with Lx51 and bit objects.
• [A51 Assembler]
  Corrected problems synchronizing MPL Macros while debugging.
• [OHx51 Object File Converter]
  Added the MERGE32K directive which generates merged HEX files for hardware with 32K common areas. Refer to the Ax51 User's Guide, Chapter 9, Bank Switch Configuration for more information. In uVision2, select this option in Options for Target - Output - Merge32K HEX File.
• [OHx51 Object File Converter]
  Corrected problems with Lx51 HEX file generation.
• [uVision2 IDE]
  Added simulation support for Analog Devices MicroConverters.
• [BETA RELEASE]
  ISD51 In-System Debugger is a new target debugger that may be linked to user applications. Refer to \C51\ISD51 for more information.
• [BETA RELEASE]
  Added a new LX51 Linker-Level Optimization called Linker Code Packing. This optimization analyzes and reduces total program size. In uVision2, enable this optimization in Options for Target - C51: Code Optimization: Linker Code Packing.
• [BETA RELEASE]
  Added two new optimizations to the C51 Compiler that reduce program code size. In uVision2, enable these optimization in Options for Target - C51: Code Optimization: Level.
• [BETA RELEASE]
  Added Linker Disassembly Output File. This output file contains the complete disassembly of your application complete with intermixed high-level source and all addresses. In uVision2, enable this option in Options for Target - Listing - Linker Code Listing.

C51 Version 6.22 Release

• [C51 Compiler]
  Corrected several problems that were introduced with Dynamic Register Allocation in Version 6.21.
• [C51 Compiler]
  Added new examples for the const far memory type.
• [C51 Compiler]
  Added support for the extended stack in the Analog Devices MicroConverters.
• [Lx51 Linker]
  Added examples for far const memory with classic 8051 devices in \C51\EXAMPLES\FARMEMORY\1MB CONSTANTS ON CLASSIC 8051. These examples show how to use memory banking with text constants.

C51 Version 6.21 Release

• [C51 Compiler]
  Corrected several minor problems.
• [C51 Compiler]
  Added the MODDA directive and library support for the Dallas 390 Math Accelerator.
• [C51 Compiler]
  Added dynamic register allocation optimization which reduces program size and data usage.
• [C51 Compiler]
  Added switch/if path combination optimization.
• [C51 Compiler]
  Added optimization for long 0 comparisons.
• [C51 Compiler]
  Corrected several optimizer problems that were introduced in C51 V6.20.
• [BL51 Linker]
  Corrected several minor problems.
• [uVision2 IDE]
  Added simulation support for the Dallas Semiconductor 80C390 peripherals.

C51 Version 6.20 Release

• [C51 Compiler]
  Enhanced the L51_BANK.A51 file to support even larger code banking programs (up to 4MB).
• [C51 Compiler]
  Added enhanced optimization for register variables.
• [C51 Compiler]
  Added variable banking support for classic 8051 devices.
• [uVision2 IDE]
  Added debug dialogs for classic 8051 devices.
• [uVision2 IDE]
  Added four 64KB user memory areas (S:, T:, U:, and V:) that may be used when debugging.
• [uVision2 IDE]
  Added functions or for special simulation capabilities (E²PROM, I²C communication, and so on).
• [uVision2 IDE]
  Improved the Version Control (SVCS) Connection and corrected several problems with environment variables.
• [uVision2 IDE]
  Added several new items to the Help Menu.
• [uVision2 IDE]
  Added several project management enhancements.
• [uVision2 IDE]
  Added numerous chips to the Device Database.
• [uVision2 IDE]
  Added simulation support for the on-chip peripherals of the following devices (complete information is available in the µVision2 Help Menu - Simulated Peripherals item.):
  • Infineon C504.
  • Infineon C505C.
  • Infineon C508.
  • Infineon C515A.
• [uVision2 IDE]
  Added new debugging dialogs for MON51.

C51 Version 6.14 Release

• [C51 Compiler]
  Added examples to demonstrate the Dallas 390 contiguous mode (\C51\EXAMPLES\DALLAS 390).
• [C51 Compiler]
  Added examples to demonstrate the Philips 51MX architecture 16MB support (\C51\EXAMPLES\PHILIPS 80C51MX).
• [C51 Compiler]
  Added far memory (above 64K) support using the \C51\LIB\XBANKING.A51 configuration file.
• [C51 Compiler]
  Added far memory examples for the 16MB memory space of the Analog Devices ADuC812 and for the AtmelWM 89C51RD E2PROM area (\C51\EXAMPLES\FARMEMORY).
• [C51 Compiler]
  Added macros for absolute far memory access in ABSACC.H.
• [Cx51 Compiler]
  Added the INCDIR directive where you may specify include paths.
• [Ax51 Assembler]
  Added the INCDIR directive where you may specify include paths.
• [uVision2 IDE]
  Added simulation support for the on-chip peripherals of the following devices:
  • Infineon C509.
  • Infineon C517A.
  • Infineon C515C.

C51 Version 6.12 Release

• [C51 Compiler]
  Removed the 256-symbol limit from OMF51 object files.
• [C51 Compiler]
  Extended the length of C variable names to 256 characters.
• [uVision2 IDE]
  Added simulation support for the on-chip peripherals of the following devices:
  • Atmel WM T87C5111.
  • Atmel WM T87C5112.

C51 Version 6.11 Release

• [C51 Compiler]
  Added the ROM(512K) and ROM(D16M) directives to select the contiguous modes of the Dallas Semiconductor 80C390. This directive must be used with the OMF2 directive. Refer to \C51\EXAMPLES\DALLAS390\README.TXT for more information.

C51 Version 6.10 Release

• [C51 Compiler]
  Finalized support for the Philips 80C51MX.
• [C51 Compiler]
  Finalized support for the Dallas Semiconductor 80C390.
• [C51 Compiler]
  Added banking mode 4 to L51_BANK.A51 for user-provided bank switching macros.

C51 Version 6.03 Release

• [BETA RELEASE]
  Added support for the Philips 80C51MX, Dallas Semiconductor 80C390, and LX51 Extended Linker.
• [C51 Compiler]
  Added the OMF2 directive which causes the C51 Compiler to output object files for the LX51 Extended Linker. This new object file format supports 16MB code space for constants and 16MB xdata space and is required for extended 8051 device variants like the Analog Devices ADuC812, Dallas 390, and others.
• [BL51 Linker]
  Added a new warning if your program CODE or XDATA exceeds the specified memory area size.
• [uVision2 IDE]
  Added simulation support for the on-chip peripherals of the following devices:
  • Dallas 320/323/520/530.
  • Philips 80C552/554.
  • Temic 89C51RD2 (including on-chip E²PROM).
  • Temic 80C51CC02.
• [uVision2 IDE]
  Integrated debugger interface for the Triscend E5 CSoC. Refer to \C51\HLP\README_FOR_TE5_UV2.TXT for more information.

C51 Version 6.02 Release

• [C51 Compiler]
  Corrected several minor problems with Optimizer Level 9.
• [uVision2 IDE]
  Added simulation support for the on-chip peripherals of the following devices:
  • Analog Devices ADuC812.
  • Philips LPC Devices.
• [uVision2 IDE]
  Added simulation support for multiple DPTR registers.

C51 Version 6.01 Release

• [C51 Compiler]
  Added the RET_ISTK, RET_PSTK, and RET_XSTK directives which unload the on-chip stack and use the reentrant stack for storing return addresses.
  
  Refer to The RET_ISTK Directive, The RET_PSTK Directive, or The RET_XSTK Directive for more information.
• [C51 Compiler]
  Added ANSI library routines modf, strtod, strtol, and strtoul. Refer to the on-line compiler manual for more information.
• [BL51 Linker]
  Modified the CODE and XDATA directives to allow address ranges. For example:

  BL51 my_prog.obj CODE(0x0000-0x3FFF, 0x8000-0xFFFF)

• [BL51 Linker]
  Modified segment control directives to allow wildcards in segment names. For example:

  BL51 my_file.obj (CODE (?PR?*?my_file (0x100))

  Locates all program code segments in the module my_file to address 0x100 and up.
• [uVision2 IDE]
  Added debugger support for MON51.
• [uVision2 IDE]
  Added simulation support for almost all 40-pin DIP devices (8051FC, RD, RD+, 8052, and so on).
• [uVision2 IDE]
  Added support for syntax coloring in assembler code.
• [uVision2 IDE]
  Added item in the context menu to insert the CPU register definition file.
• [uVision2 IDE]
  Added context-sensitive help for library routines and error messages. To get help for a library routine, position the cursor on the function and press the F1 key. To get help for an error or warning message, select the message and press the F1 key.

C51 Version 6.00 Release

• [C51 Compiler]
  Added 3 new optimizer levels which shrink program size up to 15%.
  • Optimize Level 7 (Extended Access Optimization) uses DPTR for register variables. Pointer and array accesses have been optimized for both speed and code size.
  • Optimize Level 8 (Reuse of Common Entry Code) moves common function entry code to the beginning of a function which saves code memory. Optimize (8) is the new default optimization level for C51 Version 6.xx.
  • Optimize Level 9 (Common Block Subroutines) detects and packs multiple-instruction sequences into subroutines. This optimization is most efficient on large source files.
• [C51 Compiler]
  Added specific header file support for almost all devices.
• [C51 Compiler]
  Added configuration file (\C51\LIB\CONF151.A51) for the Intel 151.
• [C51 Compiler]
  Updated the enum type to automatically adjust to 8 or 16 bits.
• [C51 Compiler]
  Added dual data pointer support for Atmel devices (AT89S8252). Use the MODA2 directive to enable dual data pointer support. Use the NOMODA2 directive to disable support.
• [C51 Compiler]
  Added dual data pointer support for Philips devices. Use the MODP2 directive to enable dual data pointer support. Use the NOMODP2 directive to disable support.
• [C51 Compiler]
  Added dual data pointer support for Temic devices. Use the MODP2 directive to enable dual data pointer support. Use the NOMODP2 directive to disable support.
• [C51 Compiler]
  C51 now ensures that register bank 0 is selected for interrupts declared without the using attribute. The instruction MOV PSW, #0 is added to these routines.
  
  Previously, you were required to added the using 0 attribute to high-priority interrupts when low-priority interrupts used a different register bank. This was the case for RTX51 Full and RTX51 Tiny applications.
  
  If your application uses only register bank 0, you may use the ONEREGBANK directive to specify that the C51 compiler does not generate the additional MOV PSW, #0 instruction.
• [A51 Assembler]
  Added C preprocessor support that expands text before the source file is assembled. Directives like #if, #else, #endif, and #include are supported in assembly source code (refer to the C51 User's Guide, Chapter 4). The #include file path is obtained from the C51INC environment variable.
• [A51 Assembler]
  Added the following predefined Macros:
  • __FILE__: Name of the file being assembled.
  • __LINE__: Current line number in the file being assembled.
  • __TIME__: Time when the assembly was started.
  • __DATE__: Date when the assembly was started.
  • __STDC__: Defined to 1.
  • __A51__: Version number of the A51 Assembler (for example 600 for V6.00).
  • __KEIL__: Defined to 1.
• [A51 Assembler]
  Added support for C-style sfr and sbit declarations. The A51 Assembler now accepts standard C-style register definition files. This allows you to use the same header files for your C and assembler source files. The following sfr and sbit declarations were added:

  sfr P0 = 0x80;
  sbit P0_1 = P0^1;

• [A51 Assembler]
  Added error output using the __ERROR__ directive. For example:

  IF CVAR1LEN > 10
  __ERROR__ "CVAR1 LEN EXCEEDS 10 BYTES"
  ENDIF

  Or using the C-style preprocessor.

  #ifdef TESTVERS && RELEASE
  #error TESTVERS GENERATED IN RELEASE MODE
  #endif

• [A51 Assembler]
  Added the INCDIR (abbreviation ID) directive where you may specify the paths to assembler include files. You may specify one or more paths to search when a $INCLUDE directive is processed. The search order for $INCLUDE is:
  • Current directory (typically, the folder of the uVision2 project file).
  • Paths specified with $INCDIR.
  • Path derived from the bin folder using ..\ASM (\C51\ASM).
  For example:

  $INCDIR (C:\C51\ASM)
  A51 STARTUP.A51 INCDIR (C:\C51\INC,C:\MYDIR)

  The search order for #include is identical to that used by the C51 Compiler.
• [BL51 Linker]
  Added the DISABLEWARNING directive (abbreviation DW) which allows you to selectively disable linker warning messages. For example:

  BL51 myfile.obj DISABLEWARNING (1,5)

  Disables warnings 1 and 5.
• [BL51 Linker]
  BL51 now sorts and locates segments according to their length. This ensures fewer gaps in memory. Use the NOSORTSIZE directive (abbreviation NOSO) to disable this feature.
• [BL51 Linker]
  Added the SPEEDOVL directive (abbreviation SP) which causes the linker to ignore references to constant segments that start with ?CO?. This speeds up the overlay process but may result in a lack of warnings with regard to constant segments. This could lead to problems if you use pointers to functions and do not manually specify the call tree references to the linker. Refer to SPEEDOVL Directive and Application Note 129: Function Pointers in C51 for more details.
  
  This directive may be useful for applications with complex pointer to function tables.
• [BL51 Linker]
  Added the RECURSIONS directive (abbreviation RC) which allows you to specify the maximum number of recursive calls allowed before the linker aborts. The default number of recursions allowed is 10.
  
  A recursive call generates the following linker warning:

  *** WARNING L13: RECURSIVE CALL TO SEGMENT

  When the maximum number of recursions is exceeded, the linker responds with the following error:

  FATAL ERROR 232: APPLICATION CONTAINS TOO MANY RECURSIONS.

  To use this directive, enter the following on the linker command line or in the Misc box in uVision2.

  BL51 test.obj RECURSIONS (100)

  Note that the linker may run a long time to detect all recursions and remove the references. Unless you have specific reasons to change this setting, you should leave it at the default level of 10.
• [BL51 Linker - Code Banking]
  Added the NOAJMP directive (abbreviation NOAJ) which disables use of the AJMP instruction in the inter-bank jump table in code banking programs. This option is required for 8051 derivatives which do not support the AJMP instruction.
• [BL51 Linker - Code Banking]
  Added the NOINDIRECTCALL directive (abbreviation NOIC) which specifies that function pointers do not access functions outside the current code bank (in code banking programs). By default, in code banking programs the BL51 Linker inserts inter-bank calls into the call table for functions called through a function pointer. If your application uses function pointers and if you can ensure that indirect calls never cross a code bank you may use the NOINDIRECTCALL directive to save space in the call table.
  
  Refer to The Code Banking Mechanism for more information about the scheme used by the BL51 Linker for code banking.
• [BL51 Linker - Code Banking]
  Added the NOJMPTAB directive (abbreviation NOJT) which specifies that the call tree is not created for code banking applications. This feature is provided for developers who will create their own code banking scheme. This directive modifies the behavior of the BL51 Linker as follows:
  • The L51_BANK.A51 code banking logic file is not required.
  • The jump and call instructions are not modified for banked functions.
  • No warnings are generated if a jump or call is made to another code bank.
  If you use this directive you must ensure that the proper bank is selected before a call is performed. The BL51 Linker no longer selects the code bank.

Example Programs

Example programs included in the \C51\EXAMPLES folder demonstrate how to use the uVision2 Project Manager and Debugger (see the uVision2 Quick Start Guide for details). Please refer to these if you are new to the tools and want to get started quickly.

Device Database™

A unique feature of the Keil uVision2 IDE is the Device Database™ which contains information about more than 400 supported microcontrollers. When you create a new uVision2 project and select the target chip from the database, uVision2 sets all assembler, compiler, linker, and debugger options for you. The only option you must configure is the memory map.

As new devices become available, they are added to the database along with data sheets and header files. For information about adding your own chips to the database or about creating your own personal databases refer to the following knowledgebase articles.

• Adding Custom Parts to the Device Database
• Creating Custom Databases

Peripheral Simulation

The uVision2 Debugger provides complete simulation for the CPU and on-chip peripherals of most embedded devices. To discover which peripherals of a device are supported, in uVision2 select the Simulated Peripherals item from the Help menu. You may also use the web-based Device Database™. We are constantly adding new devices and simulation support for on-chip peripherals so be sure to check Device Database™ often.

Technical Support

At Keil Software, we are dedicated to providing you with the best development tools and technical support. That's why we offer numerous ways you can get the technical support you need to complete your embedded projects.

• Technical Support Knowledgebase
  More than 1500 technical support questions and answers are available in the Support Solutions Knowledgebase. When a new question arises, it is added to the knowledgebase which is continuously published to the Web. This enables you to get technical support at times when our support staff is unavailable.
• Application Notes
  Numerous Application Notes help you decipher complex features and implement robust applications.
• Example Programs and Files
  Utility programs, example code, and sample projects are regularly added to the Download File section of the web site.
• Discussion Forum
  Post questions, comments, and suggestions to the Keil Software Discussion Forum and interact with other Keil users around the world.

Many of the features of our Technical Support Knowledgebase and Web Site are the results of your suggestions. If you have any ideas that will improve them, please give us your feedback!

Contact Details

If you experience any problems or have any questions about this product, contact one of our distributors or offices for assistance.

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